[TASK] Develop an UVM component or assertion module to verify PMP

[JeanRochCoulon]

Is there an existing CVA6 task for this?

• [x] I have searched the existing task issues

Task Description

Develop an UVM component or assertion module to verify PMP

Required Changes

Analyze the DV plan to see if the assertion module is sufficient to verify the PMP or if we need to develop a UVM component. UVM component from embedded cores could be reused, to be decided whether it is better to reuse it or create a new component.

Current Status

UVM component has been developed by embedded cores.

Risks

Collaboration reduction if we decide to generate a new UVM component.

Prerequisites

PMP DV plan Evaluate UVM component developed by embedded cores, to decide whether reuse it or create a new component

KPI (KEY Performance Indicators)

have an UVM component or assertion module

Description of Done

Merge on master branch

Associated PRs

No response