AXI agent changes from CEA

[khandelwaltanuj]

Hello

As per mutual agreement here the changes from CEA side on AXI agent.

Thanks and Regards Tanuj Khandelwal

[khandelwaltanuj]

Just for information, the example is still missing in this package.

Regards Tanuj Khandelwal

[khandelwaltanuj]

Hi @AEzzejjari @MikeOpenHWGroup

I am getting following warning while compiling with VCS, and I am wondering if it has something to do with modeport and clocking block. In questasim this is the kind of errors that I got while using clocking blocks.

_**Warning-[ICPSD_W] Illegal combination of drivers /home/360.1.361-EPI/users/tk223379/core-v-verif/lib/uvm_agents/uvma_axi5//src/uvma_axi_intf.sv, 56 Illegal combination of structural and procedural drivers. Variable "w_valid" is driven by an invalid combination of structural and procedural drivers. Variables driven by a structural driver cannot have any other drivers. This variable is declared at "/home/360.1.361-EPI/users/tk223379/core-v-verif/lib/uvm_agents/uvma_axi5//src/uvma_axi_intf.sv", 56: logic w_valid; The first driver is at "/home/360.1.361-EPI/users/tk223379/core-v-verif/lib/uvm_agents/uvma_axi5//src/uvma_axi_intf.sv", 142 Hierarchical path: top.axi_slv_vif The second driver is at "/home/360.1.361-EPI/users/tk223379/uvm_testbench/platforms/top/top.sv", 91 Hierarchical path: top

This warning will be upgraded to error in future releases**_

The top contains following type of assignment assign axi_slv_vif.w_trace = axi_vif.w_trace;

Regards Tanuj Khandelwal

[MikeOpenHWGroup]

Hi @khandelwaltanuj. I am not clear where uvm_testbench/platforms/top/top.sv is located. It looks like a file that is outside of core-v-verif. If that is the case, we cannot debug it. Can you provide a testcase that can be used to reproduce the error?

[AEzzejjari]

Hi @khandelwaltanuj . We have already fixed these warnings with these two PRs: https://github.com/openhwgroup/core-v-verif/pull/2535 https://github.com/openhwgroup/cva6/pull/2511

[khandelwaltanuj]

Hi @AEzzejjari

Thanks for pointing this out. I will see if I can get the good version of AXI and merge it.
Let us know, if you are able to pull the changes we made.

Regards Tanuj Khandelwal

[khandelwaltanuj]

Hi @khandelwaltanuj. I am not clear where uvm_testbench/platforms/top/top.sv is located. It looks like a file that is outside of core-v-verif. If that is the case, we cannot debug it. Can you provide a testcase that can be used to reproduce the error?

Hi @MikeOpenHWGroup

We have an example with AXI back to back. But yeah, we have not put it online yet. We need to do some cleaning before we put it online.

Regards Tanuj

[khandelwaltanuj]

Hi @AEzzejjari

Can you see if you can approve the merge request please ?

Regards Tanuj Khandelwal

[AEzzejjari]

Hi @khandelwaltanuj

Sorry, we can't approve this PR until you fix the three detected problems that I mentioned above. Otherwise, the CVA6 pipeline will not pass.

Regards Alae eddine

[khandelwaltanuj]

Hi @AEzzejjari

As I mentioned before, I have fixed all issues flagged by you. Though I have fixed issues in a branch, not in the master branch of my fork. I propose to close this PR and open another one with with the changes in my branche. And if you prefer, I propose to merge these issues in a branch instead of master. May be it will be less risky ?

Regards Tanuj Khandelwal

[khandelwaltanuj]

Hi

I am closing this pull request. I will open a new one where the changes are visible.

thanks and Regards Tanuj Khandelwal