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Published 20 hours ago • verified publisher icon openhwgroup

Add unified tracking of simulator elaboration and simulation performance

Open zchamski opened this issue 2 years ago • 1 comments

Add a means of tracking the performance of simulators used in verification, both in terms of model elaboration/compilation time, and of simulation time proper. The collected performance data are added to the simulator log file, typically cva6/sim/out_<date>/<simtarget>_sim/*.log.iss.

Changelog

  • cva6/sim/Makefile (TIME_CMD): New. (vcs-testharness): Add timing command defined as $(TIME_CMD). (veri-testharness): Ditto. (vcs_uvm_comp): Ditto. (vcs_vm_run): Ditto.

Signed-off-by: Zbigniew Chamski [email protected]

zchamski avatar Sep 28 '22 18:09 zchamski

What requirement of the project does this PR fulfill? Simulation runtime is never a factor in the quality of a verification project or the schedule of a verification project.

MikeOpenHWGroup avatar Sep 28 '22 19:09 MikeOpenHWGroup

@MikeOpenHWGroup @JeanRochCoulon @ASintzoff We can close this one as it is a "development" PR that can be used to benchmark simulators (e.g., Verilator 5 against Verilator 4, estimate the impact/penalty of waveform acquisition etc.)

As long as we know it exists, we can always retrieve it.

zchamski avatar Feb 28 '23 14:02 zchamski