Clic assertions and necessary infrastructure updates

[silabs-hfegran]

Signed-off-by: Henrik Fegran [email protected]

Includes:

• clic assertions (some minor work and bugfixes remains - some are pending rtl fixes for completion)
• uvm clic interrupt agent
• infrastructure updates to support clic agent in sim

Lacks:

• ISS setup for CLIC (lack of documentation for old interface, awaiting ImperasDV update)
• Full core_v_dv support (notably interrupt handler code and constraints for edge case instructions (e.g. mscratchcs* accesses not defined for anything but CSRRW)

[silabs-hfegran]

added do not merge to ensure that I do not add overconstraining assumes globally - pending those fixes this should be more or less ready to go