Neil Turley
Neil Turley
In addition to a basic smoke test (#106), the CI should also exercise building, simulation, and synthesis. To avoid the orpsoc-cores repo breaking these tests, a dummy test repo should...
allowing multiple aliases for the same symbol allows us to not duplicate the same symbols for every name that yosys might give it. Having different cell types with different port...
I think that when multiple netlists are being processed simultaneously, it causes problems in the layout. This isn't a big deal for the CLI, but using it as a library...
There are some pins whose position are arbitrary. The layout engine should be able to move them around to reduce wire crossings.
Currently, all unique sequences of 0's and 1's triggers the creation of a constant node. Ideally, the skin file would define * what signal values represent constants * whether to...
Currently, the generic component puts all inputs on the left and output ports on the right. There should be a way to put ports on the top and bottom as...
related to #11 and #16. JSON5 doesn't currently have a way to determine where in the file a particular JSON element is, so we cannot indicate what line a schema...
Port direction inference works if the only ports on a node only go forward or backward. Any lateral ports breaks it.
We might be able to get better analog layouts with a horizontal flow instead of a vertical flow. The convention of VCC on top and GND on bottom might be...
Right now the script just dies in an unhelpful way or it just makes a mess of the diagram. Ideally, it would explain what went wrong.