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Thanks for your response. Is it possible to have access to architectural register in XiangShan instead of physical register?

> > > We may publish our design documents shortly, but IO connection may not be available in the first edition. > > > > > > Is IO connection...

I am using a455b9f714df264edb679c81c3d6c74625ea3d82 commit version of yanqihu. there is not `l2FlushDone` or `mflushpwr` to find out the way..... > > I want to write or read content of csrs...

> > I want to implement them by calling two 64bit load and store instruction in the code. I added CLD and CST to DecodeUnit.scala. Where is the proper place...

please answer my question in https://github.com/OpenXiangShan-Nanhu/Nanhu-V5/issues thanks

> In the Nanhu version of the ROB, the `dispatchData` you mentioned is mainly used to store uop information when instructions are enqueued in ROB after the dispatch stage. Its...

thanks for the response

hi I use a455b9f714df264edb679c81c3d6c74625ea3d82 commit version. it does not have integerblock and also regfile_160x64_10w16r_sim.v. to extend DataPath and also lenght of GPRS, I just assigned 128 to XLEN in src/main/scala/xiangshan/parameters.scala...