Mayank Kabra
Mayank Kabra
Fixes # #### Describe the changes you have made in this PR - Created a new feature of buzzer - Inputs are frequency of the sound , duration upto which...
from typing import List from nmigen import * from nmigen.back.pysim import Simulator, Delay, Settle from nmigen import Elaboratable,Module,Signal from nmigen.build import Platform from nmigen.cli import main_parser,main_runner class Adder(Elaboratable): def init(self):...
Hi , I am facing issues while compiling using hls4ml convert -c keras-config.yml Attached is that i have succesfully installed hls4ml screenshot .  Attached is the error screenshot. ...
from typing import List from nmigen import * from nmigen.back.pysim import Simulator, Delay, Settle from nmigen import Elaboratable,Module,Signal from nmigen.build import Platform from nmigen.cli import main_parser,main_runner class Adder(Elaboratable): def __init__(self):...
I used this uart reciever andwith arty 35 and after synthesis the LUT count is 25 instead of 51 and simulation are failing post synthesis.
Hi, I was trying to synthesize the hls4ml accelerator using ibex process and there were synthesis error from vivado. Attached is the screenshot.  Can someone help me out. Thanks!!
Hi, I was trying to do simulation in xcelium for an accelerator built from hls4ml and integrated in esp. After typing run command in xcelium, the process is stuck at...
Hi everyone, I have a simple doubt. While running performance.cpp to get the latency results, why doesnot the relinearization happen for N=1024 and 2048. The variable context.use_keyswitching() is zero whenever...