Masayuki Ishikawa

@michallenc I've just tried this PR with imxrt1060-evk:netnsh. It works with CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y which is the current configuration but it's unstable if I disable the configuration. Actually, if I tried to...

Hi @michallenc, I took a look at the ethernet driver code for zephyr and MCUXpresso SDK and found that both define a non-cacheable area for the descriptors.

@xiaoxiang781216 For example, cxd56xx needs to use up_testset API because the SoC has a restriction to use ldrex and strex.

@GUIDINGLI Let me try this PR later.

@GUIDINGLI It seems that this PR affects all CPU architectures which support SMP. However, you modified ARM only. Please test this PR with all CPU architectures including sim.

@GUIDINGLI Also, can you provide the test code so that we can reproduce the bug?

> > @GUIDINGLI Also, can you provide the test code so that we can reproduce the bug? > > start a hello world main like this. while(1); > > just...

>ALL the arch. @GUIDINGLI Hmm, it seems that `sim:smp` stops with DEBUGASSERT ``` $ ./nuttx [CPU0] up_assert: Assertion failed CPU0 at file:irq/irq_csection.c line: 348 task: loop_task [CPU0] up_assert: Assertion failed...

@GUIDINGLI Can you attach both defconfig and .config that you can reproduce the issue?

@GUIDINGLI Can you reproduce the crash with QEMU?