Mao Yifu

You can read the code and comments in c/fasl.c, esp. the function faslin(), which parses fasl files and allocates objects accordingly.

> For background on `x86` and `x86_64` support vs. `arm32` and `ppc32`: around version 9 of Chez Scheme (plus version 8 starting from 8.9.5, if memory serves), it was rewritten...

Update: I inserted a bunch of `(printf)`s in the backend and in `cpnanopass.ss`, result is that the error occurred after select-instruction! pass. Still looking for errors in the instruction definitions...

> For the ` is not a pair` and `#f is not an exact integer` errors, those can occur when the ABI is incorrect, which you said is likely since...

> Unfortunately, the only advice I can come up with is to try to get a trace of what happens in the `(let prf0 ...)` loop in `compile.ss`, using either...

Good, now the unthreaded version can be compiled. Almost all silly errors were due to incorrect uses of `make-tmp`, without `asm-kill`. However, the threaded version cannot get compiled. Every time...

Well the error was in the machine description: I forgot to change `machine-type` in `trv64le.def`, which was the same as in `rv64le.def`, so it says compiler for trv64le is not...

Firstly, I see in other backends that the implementation of `asm-conditional-jump` uses a big macro to generate code to dispatch on different comparisons, however in the RISC-V case there's no...

@cjfrisz BTW, I put a `printf()` in the linker, `riscv64_set_abs(void* address, uptr item)` to print the `item` being relocated. In this way I get the value to be relocated and...

> It's been a little while since I dug around in the linker, so I'd need to study that code before I'd have any deep insight. > > The only...