Results 5 issues of Jasper

The top level of the efinity tool is missing, making fusesoc not find the tool. This fixes it.

The earlylast argument is not available in the `StreamFragmentWidthAdapter`'s `make` methods https://github.com/SpinalHDL/SpinalHDL/blob/2527c7c6b0fb0f95e5e1a5722a0be732b364ce43/lib/src/main/scala/spinal/lib/Stream.scala#L1833

It isn't self-evident that the clock wire of a SlowArea's ClockDomain is actually the original ClockDomain's clock wire. In order to get a clock running at the desired rate, one...

### Description I created an eBUS to RS232 interface following the schematic of https://gitlab.com/fromeijn/ebuzzz-adapter On my laptop, the adapter works fine and I get logs like this However, on my...

needs analysis
hw:foreign:usb

There's a [line in `RegInst.field()`](https://github.com/SpinalHDL/SpinalHDL/blob/6b4e7872578d423913c3458d25dca5e380ca6bac/lib/src/main/scala/spinal/lib/bus/regif/RegInst.scala#L153) which causes registers of type `ROV` to not be named. This causes trouble when iterating of the bus registers to build a register map. I...