circt
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llvm
Circuit IR Compilers and Tools
This is a draft on how we could add the Slang Verilog frontend to CIRCT and turn the AST it generates into a lower-level dialect that preserves all the Verilog...
Instead of just dedup-ing the external memory module, we include the memory wrapper module in the dedup calculation. Resolves #6445. Diff in `circt-opt -firrtl-lower-memory test/Dialect/FIRRTL/lower-memory.mlir` after this change: ```diff ---...
Currently, `firtool` is not compliant with the FIRRTL specification around how public modules and layers work. Every layer module is supposed to generate a bind file. However, currently only one...
Update the object model generated by the CreateSiFiveMetadata pass to generate `firrtl` dialect, instead of `om` dialect. Ensure all `firrtl.class` associated with the metadata are instantiated inside a top level...
This PR aims to add fundamental operators into LTL dialect, namely `until`, `next` and `repeat`, to complete expressive power according to #6618 . The current plan is: - Add `ltl.until`...
The PR implements a new heuristic to determine if a Mux is reachable from a FirReg. In general an operation is reachable from a register if its in the fanout...
Alter InstanceGraph to expose the edges and what it means to get the destination of an edge. Define an edge-filtered graph and GraphTraits that exposes the underlying graph but dropping...
Hi, The goal of this PR is to introduce a lowering of the operations in the `ltl` and `verif` dialects to the core dialects as to allow for the use...
This introduces a couple new operations to drive simulation from within an MLIR program, next to the models themselves. This can be lowered by Arcilator to create LLVM functions that...
This is a primitive Property operation, defined by FIRRTL spec section 25.1.2. General folds for signed arbitrary precision integer arithmetic can be applied, but none were defined in the initial...
