coreblocks
coreblocks copied to clipboard
kuznia-rdzeni
RISC-V out-of-order core for education and research purposes
To implement superscalarity on FPGAs, we need multi-ported FPGA memories. Such memories internally use two-ported FPGA memories and some glue logic to make them behave as a single multi-ported memory....
Hi, Here is a pull request which adds hash tables. In particularly: - Added implementation of two non-cryptographic hashes: -- Lookup3 (http://www.burtleburtle.net/bob/hash/doobs.html) -- SipHash (https://eprint.iacr.org/2012/351.pdf) - Added CountHashTab I am...
Metadata
Owner
Metadata
RISC-V out-of-order core for education and research purposes