Sungkeun Kim

@yuleisui Thank you for your quick response! I checked it works!

Hi @aswaterman, I see. "right" does not means a direction (left or right).

Thanks @allenjbaum for the clarification :D

@jerryz123 Hi Jerry, I've seen your PR #1712 that add JTAG to Arty100T. Do you have any plan for ading JTAG to VCU118? Or could you guide me to do...

@jerryz123 Thanks for your response. Yes it exposes an extra jag interface for debugging and there is a code for jtag harness binder in FPGA-shell. However, that didn’t become a...

@michael-etzkorn Thanks for your comment. I'll keep that in mind while I make PR.

I have a question for @jerryz123 or @michael-etzkorn. I'm consued with HarnessBinder in chipyard and Overlay in fpga-shells. What this feature (pin mapping for JTAG DEBUG) should be in between...

Hi @michael-etzkorn. Thanks for your response. I'm getting clear about fpga-shells structure. I've updated my code based on your suggestion and I can connect GDB through jtag and openocd. I...

@jerryz123 and @michael-etzkorn, I've made PR #1796. Would you please review it?