Kamil Rakoczy

Note: our custom version fork of yosys is still required for UHDM support, but now UHDM frontend is used as a separate plugin to yosys that is dynamically loaded.

I tried to use the new flow API using ``fusesoc``, but couldn't get it to work. Does the new flow API is already integrated with ``fusesoc``? If yes, are there...

@dependabot recreate

Hello @nelsobe, Yes, it is possible to use Surelog/UHDM front-end using symbiflow-toolchain, but it requires a few changes in the ``symbiflow_synth`` wrapper. [Here](https://github.com/antmicro/yosys-uhdm-plugin-integration/pull/271), you can find an example of building...

I've prepared draft PR adapting symbiflow-examples to use uhdm-plugin: https://github.com/SymbiFlow/symbiflow-examples/pull/244. As PR adapting ``symbiflow_synth`` wrapper is [not merged yet](https://github.com/SymbiFlow/symbiflow-arch-defs/pull/2364), in this PR I'm copying locally added ``symbiflow_synth`` to ``$INSTALL_DIR/xc7/install/bin/symbiflow_synth``. Then,...

@nelsobe PR adding optional (for now) ``systemverilog`` (renamed ``uhdm``) plugin support in f4pga-examples just got merged: https://github.com/chipsalliance/f4pga-examples/pull/244. Now systemverilog frontend can be used out-of-box, but it is still optional, as...

Looks like this is issue in the Surelog itself. I've created issue in Surelog for this: https://github.com/chipsalliance/Surelog/issues/2550 I've tested example that you reported in: https://github.com/chipsalliance/Surelog/issues/2537, using typedefs directly from package...

Marking as draft, as this PR still requires new tests.

I've rebased PR and fixed conflict. Is there anything else I can do to help get this PR merged?

> My big question is still related to how we know the proper functions are threadsafe. For Verilated, I audited every single function to have VL_MT_SAFE or VL_MT_UNSAFE. > >...