Marcel Maage
Marcel Maage
Hi, default hal config of CH32V003F4U6 uses HSI which has a base frequency of 24Mhz and a divider of 3. Thereby USART block is triggered by 8Mhz clock. Oversampling is...
Hi, unfortunately I do not have a wch-link to try it out myself. I thought I could use my ST-Link and did not order one. I have a ch32v307vct6 dev...
If I understand documentation correctly, highest bit set means that we have an interrupt and 0x26 is number of interrupt. Compared with https://github.com/ch32-rs/ch32-data/blob/main/data/interrupts/CH32V0.yaml it should be TIM2, which has thrown...
Hello, I received the wlink but was not able to test it with sdi print yet. I checked systick file before but it looks not like an easy merge/change. I...
Hi, I made the first changes to adapt time_driver_systick, but it does not work yet. I also included changes of #88. Maybe someone can have a second look. SDI print...
Hello, I was able to make systick work but with a change to embassy_time. From my point of view we have a timing problem. Default frequency of hclk(and thereby cpu)...
Hi @romainreignier , What irritates me is that we should have the same problem in the previous implementation. I will investigate that.
I would propose to switch to a default tick of 10kHz, change Cargo.toml of every example for that and mention it in Readme. 10kHz worked for me during debugging. Do...
Hello, I am able to build spi-lcd-st7735-cube for ch32v003 in release mode now but as before, it is a tight fit. Only a few bytes left. This seems to be...
I understand now, that the failing action is not building examples but repo without any features. I thereby removed my compiler warning because it was not present before. Tried it...