Jeremy Linton

Yes, I'm the guy partially responsible for the zlib acceleration patches. To answer the general question, yes the output data will vary slightly on aarch64, due to the use of...

See if its still doing it with recent releases, I think the default was a dual acpi/DT mode, so you may have to switch it to "DT" in the advanced...

I believe that the pcie-brcmstb DT code is doing a full reset sequence when it is probed. note: https://elixir.bootlin.com/linux/v5.14-rc7/source/drivers/pci/controller/pcie-brcmstb.c#L880 and then: https://elixir.bootlin.com/linux/v5.14-rc7/source/drivers/pci/controller/pcie-brcmstb.c#L962 Then the kernel calls the mailbox as part...

Fairly certain I was running with a new enough DT that the mailbox was being triggered. I added some extra pr_xx's around the reset and mailbox send, which printed information...

This is hitting the latest edk2 builds as well. I debugged it a bit in uboot last week and the mailbox is returning a 0 clock rate. I need to...

Ok, reproduced it fully with a rpi4-8G model in edk2. When it works (with a newer sd card) ... RpiFirmwareSetClockState: Request clock state C = 1 RpiFirmwareSetClockState: Request clock state...

MIN clock, or MAX clock? I think in both uboot/edk2 the returned clock rate is being used to select the smallest possible divisor for the given card (aka run it...

What happens if MAX is read, and then set? Does it actually adjust the clock rate near the max? I would imagine that would be the safe method of maintaining...

So, i'm looking at the code now, and I now remember the dance edk2+ACPI is playing with Linux. (and I think this is true of DT too for the EMMC2)....

> @popcornmix This seems to be a direct consequence of making `GET_CLOCK_RATE` specify the `REQUIRED` flag for all but `CLOCK_ARM`. I assumed you were talking about something internal to the...