Jeff DiCorpo

[Mgmt SoC Datasheet - Sheet1.pdf](https://github.com/efabless/caravel/files/12360481/Mgmt.SoC.Datasheet.-.Sheet1.pdf)

Link to an interim public document for the register definitions... https://github.com/efabless/caravel_board/blob/main/firmware/chipignite/_docs/caravel_registers.pdf https://github.com/efabless/caravel/blob/main/docs/caravel_datasheet_2.pdf

will potentially address only if we reimplement caravel.

Tim A wants test tiles from the Open MPW shuttles without polyimide. It is interfering with the processing he is doing with them. -- Jeff On Mon, Jan 16, 2023...

issue surfaced on 2311 projects for hvi and nwell

received violator cells from SWT, but they don't cover all the rules and we are missing Calibre reports to benchmark results. The reported are numerous.

1. Mitch created pseudo flow for adding subcut region. 2. Mitch to add new output style to the tech file. 3. LVS config file modification 4. Modify make ship /...

@a-omla @DavidRLindley -- this PR will require an update and verification of the tapeout flow on the platform. I can merge now or we can hold until you are ready...

need to include new issues related to created layer DRC errors.

remaining issues - licon - mcon - created layers rules - need to generate from reversed engineer work by Tim as well as violator verify if new rule deck has...