Jacob Brown

@ganeshgore @andrewmkeller is this issue still relevant or can I close it?

Using the Selection.OUTSIDE does get the outer pins. That makes sense now why you did that...so you could get either the inner or outer pins. Now that I understand it,...

Thanks for the feedback. This should definitely be improved. I'll take a look at it soon.

I have added some more explanation about parents, children, and references under the page located at Reference/API Summary/Instance. I thought this would be the best place because these three things...

The EDIF.properites and Verilog.properties need documentation. In reality, they need to not be seperate things but rather be a single properties dict. But for now some documentation for these would...

There may be an option to fix this in Synplify Pro. I'll look at that. Even if I can fix it in Synplify Pro, it may be good to make...

I fixed the problem. Now during Verilog netlist parsing, if a definition instances something that was supposedly the top instance, it updates the top instance to that definition. It won't...

@ganeshgore That's a good question, I hadn't thought of that. I believe unused modules are simply parsed in, added to the library, and then composed out without a problem. If...

Those added shortcuts in the IR look good! I'm guessing it's failing the Python 3.5 test because of OrderedDict().

I'm going to wait to merge this until we know our plan with extending classes.