Verilog topic
Verilog is a widely-used hardware description language (HDL) that enables designers to model, simulate, and synthesize digital circuits. It provides a text-based format for specifying the structure and behavior of electronic systems, making it easier to design complex hardware components such as microprocessors, memory, and communication devices.
vscode-verilog-hdl-support
HDL support for VS Code
32-Verilog-Mini-Projects
Implementing 32 Verilog Mini Projects. 32 bit adder, Array Multiplier, Barrel Shifter, Binary Divider 16 by 8, Booth Multiplication, CRC Coding, Carry Select and Carry Look Ahead Adder, Carry Skip and...
async_fifo
A dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog
core_jpeg
High throughput JPEG decoder in Verilog for FPGA
logisim-evolution
Digital logic design tool and simulator
chisel
Chisel: A Modern Hardware Design Language
openwifi
open-source IEEE 802.11 WiFi baseband FPGA (chip) design: driver, software
e200_opensource
Deprecated, please go to next generation Ultra-Low Power RISC-V Core https://github.com/riscv-mcu/e203_hbirdv2