modelsim topic
edalize
An abstraction library for interfacing EDA tools
JSON-for-VHDL
A JSON library implemented in VHDL.
vscode-verilog-hdl-support
HDL support for VS Code
logic
CMake, SystemVerilog and SystemC utilities for creating, building and testing RTL projects for FPGAs and ASICs.
hdl_checker
Repurposing existing HDL tools to help writing better code
vim-hdl
Vim plugin to aid VHDL development (for LSP, see https://github.com/suoto/hdl_checker)
FPGA-Application-Development-and-Simulation
《FPGA应用开发和仿真》（机械工业出版社2018年第1版 ISBN:9787111582786）的源码。Source Code of the book FPGA Application Development and Simulation(CHS).
DDLM
Исходные коды к главам книги "Цифровой синтез: практический курс" (под ред. А.Ю. Романова и Ю.В. Панчула)
HFUT_2020_MIPS_CPU
合肥工业大学2020年《系统硬件综合设计》（《计算机组成原理》课程设计，CPU）的代码与报告；使用Verilog实现全冒险处理机制的MIPS五段流水CPU，支持MIPS-C3的50条指令。
AHB-to-APB-Bridge
The AHB to APB bridge is an AHB slave and the only APB master which provides an interface between the highspeed AHB and the low-power APB. Read and write transfers on the AHB are converted into equiva...