gtkwave topic

VCD file (Value Change Dump) command line viewer

yne

simavr is a lean, mean and hackable AVR simulator for linux & OSX

buserror

Facilitates building open source tools for working with hardware description languages (HDLs)

IBM

SVUT is a simple framework to create Verilog/SystemVerilog unit tests. Just focus on your tests!

dpretet

Scripts to build and use docker images including GHDL

ghdl

A place to keep my synthesizable verilog examples.

JeffDeCola

mirror of https://git.elphel.com/Elphel/vdt-plugin

Elphel

Quickstart guide on Icarus Verilog.

albertxie