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Code samples related to Intel(R) AMX

Results 5 AMX-TMUL-Code-Samples issues
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If I compile the binary on an AMX host and copy it to a non-AMX host it shows that the non-AMX host does not have AMX (correct). However, if I...

The code has a bug and the example does not work correctly. I pulled the latest code and ran it. I get a imcomplete answer for C matrix.. since matrix...

Maybe it would be a good idea to also provide the code that the benchmark results are compared to, such as the C-loop and AVX versions?

Hi, Why do we configure 4 tiles (in total, i.e., i=0, i=1, i=2, i=3) here when the computation only needs 3? https://github.com/intel/AMX-TMUL-Code-Samples/blob/e4029b9184bac98ecb0c4472bc883bccc190933b/src/test-amxtile.c#L46

Could you provide a more complex example like a larger gemm (more than 16x64, like 1024x1024) to show how to use change the load tile register while moving through different...