agrobman

it's designer's leftover to debug his stuff, I'm not sure about mcycle reference there , but you need to provide DUMP_BTB_ON define to compile this code...

add `define DUMP_BTB_ON in the beginning of the el2_ifu.sv file. or add `+define+DUMP_BTB_ON` in your simulator compile command or in testbench/flist file

need to `define ... in the el2_ifu.sv file . BTW, you don't need to write to mcycle in your test.

We use warning disable switches, see tools/Makefile

Our development/production simulator is xcelium. It compiles our design with no warnings. Compilations with VCS/Questa have no warnings too. Verilator is the only one, having warnings, because is not fully...

@wallento, What verilator version are you using?

I agree with 2) too. Let us know good verilator version to start with.

the big one is sized parameters, I mentioned in verilator post. Before I ask designers to look in the warnings I need 'fixed' verilator version. I'd asked them to do...

Just ran it: ``` ./obj_dir/Vtb_top VerilatorTB: Start of sim ---------------------------------------- Hello World from SweRV EH2 hart0 @WDC !! ---------------------------------------- ---------------------------------------- Hello World from SweRV EH2 hart1 @WDC !! ---------------------------------------- TEST_PASSED...

More question: what is clk_gen_nexus module? and where the user_clk, user_rst signals driven from?