HYF

Adding a In-System Programmability(ISP) function?

3

I advise adding a ISP function to darkriscv. At present, if I write some new C codes and generate new data for ram and rom, I have to use ISE...

Some suggestion

2

1. I find that you use ```riscv32-unknown-elf-objcopy``` and ```hexdump``` to convert the ELF file to HEX file for simulation/FPGA BRAM initialization . I think you could have a look at...

I'm trying to use rv8 to run codes that are compiled by 32bits compiler. My 32bits compiler is built using --with-arch=rv32gc and --with-abi=ilp32d. And the version of my compiler is...

Optimizations to integer divider latency

1

优化点如下: 1. 在前处理过程中，计算CLZ和求被除数/除数的绝对值的操作可以并行，当操作数是负的2的幂次的时候CLZ会算错1位，此时需要使用一个2选1的MUX来进行修正，对总体的延迟影响不大，应该可以将前处理的所有操作在2拍内完成。 2. 添加一个控制信号表示只需要计算商，此时，后处理操作需要的逻辑应该可以在1拍内做完。 加入上述优化之后，预计可以将64位整数除法的延迟优化为: ``` 需要计算余数: 最大20拍 不需要计算余数: 最大19拍 ``` 目前收集到的主流CPU的64位整数除法性能(最大延迟) ``` AMD Zen3: 18 ARM Cortex A76之后的大核: 20, 但是不支持余数的计算，如果要计算余数则要再做一个整数乘加操作 Intel Coffee lake: 88(unsigned div), 95(signed div) ```...

Can you display the performance of latest version of BOOM with different configurations in README.MD?

2

Such as results of CoreMark and Dhrystone. That would be very useful, thanks! I find a picture from Western Digital, but I don't know why SweRV(2-wide superscalar in-order cpu) has...

I'm trying to design my own FPU but I find that supporting denormal numbers would add huge delay to the hardware logic. So I'm wondering is recoded format able to...

I

Errors when compiling pk using 32bits compiler

12

The 32bits compiler (riscv-gnu-toolchain) is configured with ```--with-arch=rv32gc --with-abi=ilp32d```. PK is configured with ```--host=riscv32-unknown-elf```. And I have alreay added rv32gc_compiler to ```PATH```. However, the error occurs: ``` riscv32-unknown-elf-ranlib libmachine.a riscv32-unknown-elf-gcc...