Harald Pretl
Harald Pretl
When I do a simple testbench in ngspice simulating just a single LV-NMOS (I assume it is the same for PMOS and HV variants, but I have not checked it),...
### Description A user tried to use the VHDL flow in OpenLane in our IIC-OSIC-TOOLS image, see https://github.com/iic-jku/IIC-OSIC-TOOLS/issues/43. The error is that the command `ghdl` is not working inside Yosys....
## Expected Behavior `klayout` starts w/o error message. ## Actual Behavior When klayout is started with `klayout -e -nn $PDKPATH/libs.tech/klayout/tech/$PDK.lyt -l $PDKPATH/libs.tech/klayout/tech/$PDK.lyp example.gds` then the following error message is shown:...
**Describe the bug** Importing bottleneck fails with error (likely due to numpy version 2.*) **To Reproduce** To assist in reproducing the bug, please include the following: 1. `pip install -U...