Harald Pretl

MOSFET models show nonphysical gm/ID behavior

22

## Expected Behavior The gm/ID MOSFET sizing methodology is widely used among analog circuit designers. It is known, how a physical, well-behaved MOSFET characteristic should look like. ## Actual Behavior...

Release of continuous SPICE MOSFET models

65

## Issue Currently, the only available SPICE transistor models are binned models. The model binning causes huge model files (leading to a slow simulation startup) and discontinuities across parameter sweep,...

Wrong SPICE netlist of sky130_fd_sc_hvl__lsbuflv2hv_1

6

## Expected Behavior LVS should match for SPICE netlist and GDS. ## Actual Behavior It ain't. ## Steps to Reproduce the Problem First extract netlist with `magic`. `netgen -batch lvs...

Extract of SC layout from .mag needs MAGIC_EXT_USE_GDS=1

3

When I extract the netlist from a `.mag` layout block which has been generated in SKY130 using `OpenLane`, and I use `netgen` to compare it to the powered Verilog netlist,...

ngspice simulation start very slow

13

The way the SPICE model files are organized in sky130A seem to cause a long startup time of ngspice due to the read of the model files. Is there a...

Support SPI as bus interface

7

**Is your feature request related to a problem? Please describe.** It would be a super feature if `rggen` could be used to create an SPI-based register file. **Describe the solution...

Provide Python bindings

1

**Is your feature request related to a problem? Please describe.** In order to use the generated registers in a programming environment, in addition to C also Python should be supported....

Compiling Fault on Ubuntu 22.04 on `amd64` works, but the same installation on `arm64` fails. The following code line leads to a hangup: ``` let python3 = "python3 -V".shOutput() ```

SKY130 resistors do not cause thermal noise in ngspice

3

See https://sourceforge.net/p/ngspice/bugs/614 By default, `ngspice` **does not simulate thermal noise for behavioral resistors**, which are used in the SKY130 model files. Thermal noise can be enabled by adding the parameter...

Failing flow on step "Check Antenna Properties of Pins in The Generated Design LEF view"

3

### Description Running a simple Verilog example using OL2 v2.0.0b17. ### Expected Behavior No fail. ### Environment report ```sh foss/designs/example/dig > openlane.env_info || python3 ./openlane/env_info.py Failed to get Docker info:...