Helmut Neemann

The parser used to extract the interface definition directly from the hdl code has some weaknesses. It does not cope with every file. In these cases, you can simply enter...

A circuit like this works perfectly fine:  Think of a real circuit: how do you build a driver that can pass High-Z?

When a circuit is built with C-MOS logic, it is dangerous to leave an input open (high-z). This can lead to excessive current consumption in the input stage, which in...

I have already thought about it too. The problem is that then almost all existing files would no longer work. You could add new more configurable components, but then there...

That is certainly true. But even an automatic adaptation of existing circuits is not as simple as it seems at first. In my eyes, the effort and the risk do...

Adding some additional optional inputs to the D-AS-FF may not be that complicated if they are disabled by default. However, the VHDL/Verilog templates would become much more complex. I will...

I'll have to think about that. So far I use this mechanismuss only to deal with changes that can be corrected automatically without the user having to do anything. If...

Good idea!

The file seems to be truncated. Can you zip the complete file and attach it here?

Pin descriptions are not mandatory, unlike a unique description of the chip, which is ensured during the build. Therefore, they are only present on a few chips. The different names...