Han-Chung Wang comments

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                                            Han-Chung Wang

[DT][Fusion] Move set encoding after forming dispatch region

I push the changes to https://github.com/iree-org/iree/tree/shared/data-tiling-fusion Run e2e compilation flow: `iree-compile --iree-hal-target-backends=llvm-cpu --iree-llvmcpu-target-cpu=znver4 --iree-llvmcpu-target-triple=x86_64-unknown-linux-gnu --iree-opt-data-tiling=false --iree-flow-enable-data-tiling ~/matmul.mlir -o /tmp/z.vmfb ` The current status is that all the ops are in...

[DT][Fusion] Move set encoding after forming dispatch region

I took a stab at writing down the IR for materialization pass. The first two set encoding ops should be hoisted to other new dispatches, but it is okay for...

[DT][Fusion] Move set encoding after forming dispatch region

Closing the issue because we already enabled this path for padding approach, which shows that we can set encodings after forming dispatch regions.

[DispatchCreation] Failed to hoist out of dispatch in DT-fusion

This may be the case that we don't hoist the set_encoding ops out. Otherwise, it increases memory footprint. I don't know what happens if we clean the TODO. I don't...

[DispatchCreation] Failed to hoist out of dispatch in DT-fusion

> Just leaving this here so it's easier to follow: [#21181](https://github.com/iree-org/iree/pull/21181), I believe you're handling the case where we _would_ try and hoist the slice of IR out of the...

[Encoding] Refresh practical encodings to follow the naming convention.

It based on https://github.com/iree-org/iree/pull/21144

dominance-related failure occurs when compiling an opt model

> dom_error_repro.torch.mlir:62:11: error: operand #0 does not dominate this use %55 = torch.aten.item %54 : !torch.vtensor -> !torch.int It usually indicates that we don't set insertion point before creating an...

[mlir] Convert `expand_shape` to more static form

> My main concern here is that the generated casts are not guaranteed to fold with other casts. There is [ChainedTensorCast pattern](https://github.com/llvm/llvm-project/blob/060d151476b871b48662dbd1947b67d9b0ae9d13/mlir/lib/Dialect/Tensor/IR/TensorOps.cpp#L419C8-L419C25), which folds the tensor.cast ops into a single...

[MLIR] VectorEmulateNarrowType to support loading of unaligned vectors

I was wrong about shift+and things, I need to think more about it.

[CPU] linalg.pack op is not fused in forall distribution

The root cause is that the consumer fusion is not completed in the [pack op TilingInterface implementation](https://github.com/llvm/llvm-project/blob/3f196e029314e3ccb429413a5f38ad241e50f3c5/mlir/lib/Dialect/Linalg/Transforms/TilingInterfaceImpl.cpp#L772-L796) ```cpp // Currently fusing `packOp` as consumer only expects perfect tiling // scenario...