Adrian Negreanu

> Can you fold #924 in this PR? done.

i'll upload a new version. the new code from board should sit in system (already defines the xtal freq and has a waitUS function too)

it looks to me that system_LPC43xx.c::SetClock() does the same thing as board_LPC43xx.c::sdk_init(). am I missing some init order or some other bits?

From what I see, PLL1 MSEL (multiplier) is different between `system_LPC43xx.c` (19) and `lpc43xx_cgu.c`(9); `system_LPC43xx.c` is setting PLL1 to 20x12MHz and `lpc43xx_cgu.c` is setting it to 10x12Mhz. I'll modify the...

> The comments in `system_LPC43xx.c` say PLL1 is 120 Mhz. i've tried to have PLL1 at 120MHz, but I hit the error `#error "PLL1 Fcco frequency out of range! (156MHz...

> > If we want to increase to 180 Mhz, I would rather we use `system_LPC43xx.c` as a basis > using its set-up (`PLL0USB`, `PLL1`, `BASE_M4_CLK`, `FLASHCFG_FLASHTIM`, etc.). That's how...

I've dropped the commit in which PLL1 was put into direct mode and the CPUFREQ was set to 180 MHz, so no functionality is changed now. Added new change to...

v2: - fixed the lpc4322_bl target by defining SWDP_SGPIO per-board (records/board/mimxrt1170_evk_qspi.yaml) - use DAP_Data.nominal_clock instead of infering it from DAP_Data.clock_delay.

v3: - fix DAP_Info for debuggers not yet supporting cmsis-dap v2.1. v2: - fixed the lpc4322_bl target by defining SWDP_SGPIO per-board (records/board/mimxrt1170_evk_qspi.yaml) - use DAP_Data.nominal_clock instead of infering it from...

> @groleo: Can you put [[8774a9e](https://github.com/ARMmbed/DAPLink/commit/8774a9edaf5096ff7631a3033cd4d0790f8cae62)] in a separate PR? Done