Results 35 issues of Greg Davill

In-line resistors on high speed banks leading to the PMODs prohibit use of these pins for ~gigabit speed signals. Solutions: - Add parallel inline capacitor as a high speed bypass....

r0.1

- The FPGA applies a weak pull-up to all un-configured pins. - The user LED is connected to a 1v8 I/O designed to be activated in an open-drain configuration. -...

r0.1

While IDLE the FTDI appears to drive the bus reasonably hard. Enough to result in signals only making it to around 1/2 Vcc when driven by the FPGA. Because the...

r0.1

PSRAM is available in standard SOIC8 packages, the hardware is populated with a Wide SOIC8 footprint. The RAM still fits well enough. Severity: minor.

r0.1

Feature request from Twitter: > Greg, I was wondering if your Boson GIG-E interface will support anything like NTP/PTP or some kind of time sync?

enhancement

Many of these PCBs were designed with Skidl, and the xml output format of the BOM doesn't contain orderable part numbers.

## Summary The update software could also be used to upload custom firmware. ## Description of feature Currently the windows update tool is compiled with an embedded firmware. Adding some...

It would be nice to remove the dependencies around the verilog DVI generation. litevideo already includes a TMDS encoder module that should work in place of the verilog one. https://github.com/enjoy-digital/litevideo/blob/master/litevideo/output/hdmi/encoder.py...

enhancement

## Summary During an update if the update is larger than 512KB the bootloader _wil_l become corrupted. This is a bug in the bootloader, and due to a lack of...

bug

Radiometric bosons are now available. This means that the are capable of outputting a calibrated temperature per pixel. Making use of this will require capturing RAW pixel information from the...

enhancement