gr-verilog
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gnuradio
The following error occurs when I try to build gr-verilog on archlinux (Kernel: 6.5.3-arch1-1): $ cd gr-verilog $ mkdir build $ cd build $ cmake .. Output: -- The CXX...
Once again started over with a clean 3.10 template and fixed functionality afterwards. I did not manage to get the binding generator running automatically without issues. Might be an issue...
Currently Verilator is the only supported simulation engine. It is fast and Free and Open Source Software and remains an excellent default option. Recently cxxrtl was implemented and merged into...
This can otherwise be problematic for calls to `$readmemh` etc.
Current Byte, Short, Int, Float, and Complex data types are supported through different blocks and files, but the code is almost identical between them. Following the pattern of other GNU...
Verilator is capable of generating VCD files with the states of logic lines for visualizing the execution of the HDL. GTKWave is a Free and Open Source Software application for...
Originally requested by @gs-jgj at https://github.com/B0WEN-HU/gr-verilog/issues/4 This is part of being able to handle bursts of data. Supporting `sob` and `eob` for starting and stopping transactions on the HDL buses...
Currently there is support for flowing data in and out of HDL but no control support. Verilator supports directly modifying register values which could be a simple approach here. It...
From https://www.cgran.org/submit: - [ ] Create MANIFEST.md in the root directory of your OOT (example manifest) - [ ] Create the PyBOMBS Recipe File (.lwr file) instructions at the bottom...
PyBOMBS should be able to install gr-verilog on Linux based OSs After https://github.com/gnuradio/gr-verilog/issues/1 has been completed a GNU Radio 3.8 recipe should be added.