gaasedelen
gaasedelen
There's a variety of inaccuracies in the hexrays/decompilation output that will require additional heuristics for a more accurate portrayal. To give some examples, switch statements look like they'll need work:...
Writing blocks out to file (database) apparently isn't complete. When trying to use BlockExtract on the sample tests/ls32_ELF you can see it bail while serializing the blocks to write to...
Extending codereason to include a ROP Compiler tool is a feature to strive for. Ideally it could take arbitrary shellcode for x86/AMD64/ARM or some pseudocode equivalent and translate it to...
If we would like to keep RopScore, it needs to be brought up to spec with the current codebase.
./libs/ExprParser only has x86 partially implemented. At some point it would be nice to have x86 completed and have support for x64, ARM, or any other architectures CodeReason handles.
Not a huge deal, but it would be nice if printIR was updated or finished as 64bit registers cannot be printed. Right now all you get is 'UNSUP' for registers...
Also supported by VEX/Capstone. Implementing this is a low priority as it's unlikely to get much usage.
MIPS is also supported by VEX/Capstone so we should be able to add support for it too. This is lower priority as really working with MIPS isn't super common.
Most ROP tools support 32 & 64bit PPC, so we probably should too. Capstone and VEX both have support for PPC, so we have no reason not to :P
The new vexTRUNK supports ARM64, so it would be nice to support ARM64 in CodeReason as I'm sure we'll be seeing more ARM64 soon enough. This would probably require quite...