fkuzume
fkuzume
in ARMv7_CPU.prototype.usat = function(inst, addr) ` var ret = this.unsigned_satq(this.sint32(operand), saturate_to); ` The above statement is incorrect. The following description seems to be correct. ` var ret = this.unsigned_satq(bitops.sint32(operand), saturate_to);...
MOVT doesn't seem to be working as expected. Please check the following : ``` ARMv7_CPU.prototype.movt = function(inst, addr) { this.print_inst("MOVT", inst, addr); var imm4 = (inst >>> 16) & 0xf;...
The typical instruction `ROR r2, r0, r1` appears to be unimplemented. Just letting you know.
``` mov r1, #0xff mov r0, #32 str r0, [r11] ldr r1, [r11, #3] ``` When the value of r11+3 isn't a multiple of 4, the ldr instruction doesn't function...
``` mov r0, #32 mov r1, #64 str r1, [r11] add r2, r11, #1 swp r3, r0, [r2] ``` When the value of r2 is not a multiple of 4,...
Even when the result of the muls instruction is 0, the CPSR's Z flag does not become 1. When r0=r1=65536, `muls r0, r1, r0` is executed, the Z flag does...
An issue has been detected where the smlal instruction does not produce the expected result. ``` mov r0, #4 mov r1, #-8 mov r2, #32 mov r3, #0 smlal r2,...
I have reviewed the issue you pointed out concerning the writeBack mechanism in the title:_armSTM() and _armLDM() functions. Here's a proper analysis and the proposed solution. In both the title:_armSTM()...