Fischer Moseley
Fischer Moseley
I'm trying to infer a true dual port BRAM on a Xilinx Series 7 chip, but I'm not having much luck. I've written the following to try to map the...
Hello! Just wanted to say thank you for putting together this package - using it has been genuinely magical. I wanted to ask if it'd be possible to update the...
Right now it's only advertised in the repo structure page, and there's not any instructions for how to build them. It really is just as simple as setting a few...
I've got one lying around, and I think it'd be useful to provide some examples with the Gigabit Ethernet that's on the Nexys Video. And if I can toss in...
Right now each Ethernet packet is a single bus transaction, which is rather inefficient as multiple bus transactions can easily be packed into the data field of an Ethernet packet....