cepheus

It has been so long ...

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I think more tests could be added around Union / Struct（packed / unpacked）/ Enum types which would probably need member-access feature. If it is unsupported currently, adding the test into...

It is still in testing and developing. The SVModuleOp will be pushed later.

The test of InstnaceOp / unconnectedOp / outputOp / SVModuleOp will be added soon after finishing SVModuleOp.

The example for instanceOp & UnconnectedOp: ```systemverilog module sub(input a, output b); endmodule module top; wire i; sub sub (.a(), .b(i)); endmodule ``` To generate: ```mlir module { ...... moore.module...

Agree with the first design. The reason why we should use a terminator with net / variable declaration instead of block arguments: We should not eliminate variable/net logic in the...

It looks like: ```mlir moore.module @A(out a : !moore.xxxx) { %a = moore.variable "a" : !moore.xxxx moore.output %a : !moore.xxxx } moore.module @B(out b : !moore.xxxx) { %b = moore.net...

That means we need new interfaces for specified operations 🤔 So MooreOpInterface is coming ?

Due to lack operations related to unpacked array in llhd dialect. We could not establish the bridge for the `unpackedArrayType` at moment. Personally speaking, there are two methods: 1. materialize...