eddieh-xlnx

Can you attach the logical and physical Interchange netlists please?

Thanks for reporting this! Looks like there was a change of behaviour in #486 (from which https://github.com/Xilinx/RapidWright/commit/30424682618c64533fffdedeb05d9e58159571e9 is derived) that silently broke how LUT routethrus could be inferred. This should...

Ah, that's frustrating. I suppose RapidWright should only be reporting what Vivado gives up rather than embellishing its own meanings. Looks like I can't rely on this property then!

It looks like there's not much value to the "current" field? This is the value seen by the OS, which is less accurate than JVM in terms of developer feedback....

@jakobwenzel This PR is a little stale now. If you still think this is important, get in touch!

@clavin-xlnx Since #379 is in, can we close this now?

Unfortunately, RapidWright does not support the formats -- `.eblif`, `.net`, `.place`, `.route` -- that F4PGA/VPR uses and so you'll have to write custom code to import them into RapidWright's data...

It looks like the original intent of this PR was to add partial static routing (which should be present in RWRoute now) but along the way it morphed into some...

@clavin-xlnx In light of #774, is there still a need for this helper method? This issue references #575, which is responsible for unrouting nets, stating that it relies on `PIP.isReversed()`...