RISC-V-On-PYNQ
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drichmond
RISC-V Integration for PYNQ
About the issue of interrupt generation and interaction, the orca processor currently does not have that functionality of servicing external interrupts. We used the default parameters provided and that does...
In tutorial 2, https://github.com/drichmond/RISC-V-On-PYNQ/blob/master/notebooks/tutorial/2-Creating-A-Bitstream.ipynb for skipping steps it is mentioned for skipping step 1 "To skip the first step, Packaging RISC-V Source as Vivado IP, copy the picorv32_tutorial folder from...
#critical Hi, We followed all the steps for RISC-V setup on PYNQ Z2 board. But during the last step, in packaging the overlay, when we tried to run this code...
Hi, When I run the configuration part, I don't get any error and I get the configuration successful message. Now the problem is when running the compilation part. `build_log =...
