David Biancolin

> Another option that I have seen used a lot in rocket chip is to use Bundle as a suffix which is a little more accurate (not all bundles are...

I suspect that maybe the sriracha plugin isn't playing nice with bloop? At one point we supported a native bloop build in CY, you could try going back to the...

Sriracha is the plugin we're using to support both source and published dependencies of chisel & firrtl, hence their missing *.jsons.

The no definition found thing is symptomatic of an earlier compile problem. Now it seems like the scala compiler itself is out when it's trying to compile the firrtl interpreter....

Right, part of why i thought it might be sriracha in the first place was because chisel.json and firrtl.json weren't being generated during bloopInstall. This too appears to be the...

That is the plan. It is a substantially bigger under taking here though.

When we did have native bloop support, IIRC i had to separately run bloopInstall the jsons from both chipyard and FireSim. I think in VSCode you should be able to...

Now that we have this stuff merged in i'll take the time in the next few weeks to figure out what's up. At SiFive we're using VSCode for most of...

So i got vscode X metals to work under FireSim-as-top, and i think i had the same problem you had @tymcauley. If bloop isn't installed (listed as a plugin in...

Do you have instructions to reproduce this error? It seems to show up fine for us. Is there any chance you didn't have any FpgaDebug annotations in your design?