Dave Keeshan

@amykyta3 I am not sure how one can connect anything into cocotb if the hooks into verilator are broken, I went looking for anything I could find just instating the...

@amykyta3 Sorry I meant to say this in the previous post (don't try an post comments on a Sunday afternoon with screaming kids running around), I hope you can use...

Ah man, all simulator work seems to have some anti pattern problems, hacks upon hacks. When you need to get something out the door you do it with the stated...

@darsor OK i have incorporated `regblock-vhdl` into my cocotb testbench for etana. https://github.com/daxzio/PeakRDL-etana/actions/runs/19045553460/job/54392747879 it mostly passes, except the `regblock` testing now has the ability external write-buffered register syntax fixed, #167,...

@RasmusGOlsen my work to interface back to both regblock and regblock-vhdl is effectively a wrapper, that is one step off a testbench. I had not heard that about tb generated...

@amykyta3 I would like to provide some context. First i understand your desire to limit technical debt, and while I always try to do the same some times the situation...

> * Unrolled as a flat case statement: 136 LUTs > > * Series of if() statements in an always block (similar to address decode): 136 LUTs I looked at...

the current head of cocotb-bus is compatible with cocotb 2.0.0, it is the fact the the release version in pypi, from 2022, is not: https://pypi.org/project/cocotb-bus/0.2.1/ the code needs a new...

@aignacio No i was thinking more on the master side. The `hready_in` goes and stays low just as the transaction starts, it is a rare event, but I believe it...

@aignacio I think I understand what you are saying, but I don't know if I have conveyed what I want to achieve, for context I have 25+ years of ASIC...