armv4t_emu
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daniel5151
An emulator for the ARMv4t instruction set written in Rust
At the moment, the `Memory` trait assumes that all memory accesses are guaranteed to succeed. In reality, it's entirely possible for a memory access to fail, and for a Prefetch...
The core emulator code doesn't actually use any features from `std`, so it should be entirely possible to add `no_std` support (behind a "std" feature-flag). I'm not entirely sure _why_...
The ARMv4t ISA can be extended through the use of co-processors connected to the main CPU core. For example, the EP9302 SoC used in [`ts7200`](https://github.com/daniel5151/ts7200/) includes the MaverickCrunch Math Co-Processor...
ARMv4t expects all memory accesses to be properly aligned. As such, unaligned accesses lead to some weird behavior... - https://heyrick.eu/armwiki/Unaligned_data_access - http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0471m/pge1358786965538.html - https://medium.com/@iLevex/the-curious-case-of-unaligned-access-on-arm-5dd0ebe24965 AFAIK, there's already been [some work](https://github.com/daniel5151/armv4t_emu/blob/master/src/alignment.rs)...
The ARMv4t architecture is bi-endian, and is capable of switching between little endian and big endian mode on-the-fly. That said, none of the systems I've personally worked on have utilized...
I'm running into an `unreachable!` code here: https://github.com/daniel5151/armv4t_emu/blob/7146935b514124f2ce5b1a911a81790c51b1e4c0/src/arm.rs#L447 From what I can see, this is during instruction decode, after figuring out the instruction is either `HwSgnXferR` or `HwSgnXferI`. Then, there's...
I'm running into a panic here: https://github.com/daniel5151/armv4t_emu/blob/7146935b514124f2ce5b1a911a81790c51b1e4c0/src/reg.rs#L118 My program terminates with: ``` rust thread 'main' panicked at /home/omarandlorraine/.cargo/registry/src/index.crates.io-6f17d22bba15001f/armv4t_emu-0.1.0/src/reg.rs:118:14: CPSR contained invalid mode bits ``` I can see the comment says,...
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An emulator for the ARMv4t instruction set written in Rust