Damien Doy

Hello, It will be a bit hard to find what the problem is without more info, but here are a couple of questions/suggestions: Were you able to synthesize and test...

Hi, These examples have been only tested with the version 0.9 of yosys (see readme for the version of all the tools). So if you downgrade yosys to this previous...

Hi again, After a long time I finally found what was the problem, a missing `-top top` command in the yosys command in the Makefiles, to indicate which verilog module...

Hello I have only tested the code on the [Icestorm](http://www.clifford.at/icestorm/) open source toolkit, it should work with the correct versions as described on the readme. However, I have never tested...

Hello, There were an error during the placement of the design, this is the reason you would not get the files. However I am a bit confused because the error...

Hello, Yes you can freely share the examples without any problems as long as there is a note or a link to this repo. These examples were created for these...

Hi, It seems strange that your Ubuntu is recognising it as a drive, is it reading the flash? If you are using the breakout board, can you please try to...

Yes indeed, that was an issue. Should be fixed now in the master. Thanks for reporting it !

Hello, I don't think I specify the editor/IDE I used for these examples, in the end if you compile with gcc and the right libraries it should be enough no...