Dag Lem

Learning some more Verilog, I realized that e.g. array reduction can be done along the lines of the following: ``` item_t _sum[array.size]; for (genvar i = 0; i < array.size;...

> And again : printer is so much faster on U2 than U2+, most of time is spent on PNG generation, in bitmap compression routine. @GideonZ Perhaps it would be...

@GideonZ Sounds good! Regarding capable open source RISC-V implementations, here is a (slightly dated) report on that, in case you want to look into it later: https://www.esa.informatik.tu-darmstadt.de/assets/publications/materials/2019/heinz_reconfig19.pdf Given that you...

@GideonZ I would be interested in trying out GHDL + yosys and nextpnr once you have something ready for the U2+L. Actually, the focus of yosys AFAICT isn't on Verilog,...

> > @GideonZ I would be interested in trying out GHDL + yosys and nextpnr once you have something ready for the U2+L. > > @daglem : Not sure what...

I attempted to run parts of the VICE testbench on a real C64 via a 1541U2. This fails since the debug register is seemingly only accessible on a U64 (code...

OK, that's unfortunate. Could you conceivably just read/write $d7ff directly, and rely on the fact that any value written to the SID chip will be living on the SID data...

Thinking some more about it, I guess the value of the debug register doesn't have to be read from $d7ff at all? If I understand correctly, it is only read...

OK, so you'd simply need a "shadow" 6510 emulation in order to keep track of the I/O registers? ;-) Jokes aside, if the only functionality of $d7ff is to store...

> It fails when a program writes to the RAM location $D7FF, because the debug register will also be triggered then. I think it is much preferable to have a...