Mitch Bailey

Unconnected unmatched ports cause mismatch. Unmatched subckts only partially flattened.

1

From slack channel discussion https://skywater-pdk.slack.com/archives/C017UA7LEUV/p1628746152015600 netgen 1.5.196 During device level LVS comparison, proxy nets are created for unmatched ports. This can happen when a layout has 2 or more unconnected...

segfault with caravel/chip_io and flattened primitives (example cells) in magic.

1

As per the conversation on slack. https://skywater-pdk.slack.com/archives/C017UA7LEUV/p1626212742054500 [netgen-debug-20210714.tar.gz](https://github.com/RTimothyEdwards/netgen/files/6819263/netgen-debug-20210714.tar.gz)

Verilog bus map to spice subcircuits in reversed order

5

Verilog bus indices in instances are being mapped in the wrong order to spice subckt definitions. Extract the tarball into a new directory ``` netgen -batch source storage.netgen.ng netgen -batch...

Parallel series mosfet matching depends on order of devices

1

Netgen 1.5.155 The matching of parallel series of mosfet appears to depend on the order of mosfets in the netlist. The tarball contains 2 sample netlists. One extracted from the...

Version 8.3.328 On larger designs, I've noticed that pins with the same name are extracted as unique even though they are connected. This appears to be true on large designs,...

I'm flattening the sub cells of chip_io before extracting because of hierarchy differences. Here's the normal klayout view of `sky130_fd_io__top_xres4v2`. magic hierarchical view is the same. Nothing unusual. Here's the...

extract unique notopports not working as expected

2

Version 8.3.322 Expecting `extract unique` and `extract unique notopports` to give the same results for all subcircuits expect the top level ports. However, subcircuits with unconnected wires that have the...

freeMagic called with NULL argument message when processing gds

1

magic sometimes produces `freeMagic called with NULL argument` message when processing cells after reading gds. Version 8.3.328 Sample output ``` Reading "output_buffer". Reading "sky130_fd_pr__pfet_01v8_lvt_75KH85". Reading "BGR_lvs". Reading "VCO". Reading "sloci_top3"....

Trying to extract the gds for slot-010 of mpw-6 and getting a seg fault. Using `Magic 8.3 revision 308` on `Linux ciic-cvc 4.19.0-20-cloud-amd64 #1 SMP Debian 4.19.235-1 (2022-03-17) x86_64 GNU/Linux`...

Incorrect pwell connections for standard cells in dnwell

5

Magic 8.3 revision 308 Tech file version 1.0.291-20-g05af1d0 MPW-5 slot-009 armleo gpio mpw5 test chip There are standard cells placed in dnwell region. The pwell connections (VNB) for some standard...