Yibo Cai

Support fixed size SVE

1

This PR adds fixed size SVE support to xsimd. Client must specify the vector size in compiler options to enable SVE features. E.g., `-march=armv8-a+sve -msve-vector-bits=128` Make sure the vector size...

[DISCUSSION] How to support Arm SVE

24

I'm investigating how to support Arm SVE/SVE2 [1] in xsimd. SVE vector is size agnotics. The register size (lanes) is determinted at run time, and the according C/C++ type is...

Possible out of range input buffer access

3

Thanks @ReneNyffenegger for this useful c++ base64 library. I noticed a similar old issue https://github.com/ReneNyffenegger/cpp-base64/issues/24 Looks the problem is not fixed for invalid inputs. As a simple example, `base64_decode(std::string("a"))` will...

For vector size > 128, xsimd `zip_lo` and `zip_hi` api zips per 128-bit lane, as described in [_mm256_unpackhi_epi8](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_unpackhi_epi8&ig_expand=7358). I'm wondering if this behaviour is wanted in practice. I do see...

ARROW-18162: [C++] Add Arm SVE compiler options

4

As xsimd only supports fixed-size SVE, we have to specify vector size explicitly on command line. And the binary can only run on hardware with matched vector size. Otherwise, the...

arm: optimize decoder on Arm SVE2 platform

9

This patch improves sonic json decoder performance on Arm SVE2 CPU. It leverages SVMATCH instruction to locate multiple tokens in a vector efficiently. Enable this feature by specifying cmake option...