cr8601

The problematic verilog is the case statement: [plic_dynamic_registers.sv#L607](https://github.com/RoaLogic/plic/blob/11018162b24c6484308c93bed10eb1a485f3d940/rtl/verilog/core/plic_dynamic_registers.sv#L607) register_function(r) is a function, but needs to be constant or parameter for synthesizable (system)-verilog The function is declared here: [plic_dynamic_registers.sv#L211](https://github.com/RoaLogic/plic/blob/11018162b24c6484308c93bed10eb1a485f3d940/rtl/verilog/core/plic_dynamic_registers.sv#L211)