William D. Jones
William D. Jones
[naveen521kk](https://github.com/naveen521kk): Thank you for your effort. >although I'm not sure how I would replace the vendored version in my Python with this version for testing purposes. I have Python installed...
@taiki-e Okay, good to know (thank you for the link as well). Also, from what I understand since I wrote the issue, inline `asm!` won't ever be optimized _out_ either...
>Is it actually because it is volatile? Yes, volatile ("Do not optimize away. Do not reorder with other volatile code.") was what I had in mind. I don't see why...
>volatile seems to guarantee that asm will not be removed, but it does not guarantee that memory accesses will not be reordered I was confused because in a [previous comment](https://github.com/rust-embedded/msp430/issues/11#issuecomment-1204919256)...
This is already being worked on in the [`critical_section`](https://github.com/rust-embedded/msp430/tree/critical-section) branch. There are a few optimization/codegen problems I'm [looking at](https://github.com/rust-embedded/wg/blob/master/minutes/2022-08-23.md#agenda) before deploying it/releasing a new version. This version will be semver-compat...
> All actual use cases ought to work by passing a &CriticalSection. If we pass a `&CriticalSection` to `enable_cs`, it becomes possible to enable interrupts within `interrupt::free`, which breaks the...
@chrysn >My impression is that an interrupt-enabling function is generally unsafe (as long as anyone wants to depend on being inside an interrupt-free section) I don't actually have a problem...
>because all *individual* interrupts are off already Ahhh, I guess because of NVIC, all peripherals already have to have an interrupt enable bit. There is no guarantee in MSP430-land that...
>The only way I can see of fixing this is to make interrupt::free() take FnMut My gut feeling is that this would be a _really_ bad idea and cause many...
>Does any other embedded Rust ecosystem have some way to safely set interrupts? If they do then we can copy them. ARM enables interrupts before entering main. This works because...