openasip
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cpc
Open Application-Specific Instruction Set processor tools (OpenASIP)
The [attached files](https://github.com/cpc/tce/files/9443979/ttabug.zip) will produce an error message in `ttasim-tandem`: ``` rother@pikachu:~/Documents/TTA/GBP_TTA/tta_test$ ttasim --version ttasim - TCE Simulator command line interface 1.25-r4248 rother@pikachu:~/Documents/TTA/GBP_TTA/tta_test$ ttasim-tandem baseline.adf test.tpef SIMULATION ERROR DETECTED (PCs...
When trying to compile a program using tcecc I get the following error message: ``` rother@pikachu:~/Documents/TTA/GBP_TTA/tta_bug$ tcecc --version tcecc - TCE retargetable compiler 1.25 rother@pikachu:~/Documents/TTA/GBP_TTA/tta_bug$ tcecc -x c++ -O3 -a...
In the RISC-V tutorial we now need to add a dummy Verilog file although we do not want to generate Verilog, which seems unoptimal.
The RISC-V tutorial asks to install a custom op module there, but it's not found.
It should at least search from the build (source) tree in case TCE_DEVEL_MODE=1 to enable running/testing the build tree without relying on an installed OpenASIP.
