Claudiu Zissulescu-Ianculescu

This require a proper implementationof `unchahed` attribute.

Why should we care about this? `libnsim.a` and `libqemu.a` are simulation only libraries. No reason to optimize them as they will never be used in production.

You need to ask them :)

> What about `libdw_uart.a`? My understanding is that you want to remove it (or refactor it?). You can pick this issue and make it part of your proposed solution.

> And also even though we build & install "nano" version of `libm.a` (`libm_nano.a`) we don't replace `-lm` with `lm_nano` in `nano.specs, while RISCV folks do, see https://www.sourceware.org/git/?p=newlib-cygwin.git;a=blob;f=libgloss/riscv/nano.specs: > >...

Probably the solution is to add to the link command also the *libmwcl.a* which implements the missing functionality.

The excess code is due to _aligned_ property of accesses in ARC600 processor. Also your structures are byte _aligned_ which means that all your accesses are done via _ldb_ or...

Alternatively, you can use `-mno-volatile-cache` option with your particular function to generate `.di` accesses whenever a variable is volatile. This can be used as a work-around for the time being.

It just check if the variable is `volatile`, if so, the `.di` is generated.

Store instructions like: ```asm movl r0,@Arr_2_Glob st.as 10,[r0,40] ``` should be combined: ```asm st 10,[@Arr_2_Glob + 40