dhrystone: Optimizations

[claziss]

• [x] Inline memcpy
• [x] Jump Table re-enable.
• [x] Delay slot scheduler
• [x] Check if conditional execution is optimal
• [x] More 8-bit operations?

[claziss]

Store instructions like:

	movl	r0,@Arr_2_Glob
	st.as	10,[r0,40]

should be combined:

	st	10,[@Arr_2_Glob + 40 << 2]

[claziss]

Constant propagation is too aggressive for ST instructions leading to suboptimal code:

        movl_s  r15,8
        addl    r0,r16,r15
        stl     r2,[r0]
        addl_s  r0,r0,r15
        stl     r2,[r0]