Verible formatter fails when third line of port list is blank

[paul-demo]

v0.0-3454-g7fdc2876 Commit 2023-12-20 Built 2023-12-20T15:18:36Z

Test case

module my_module (
        input   logic                           clk_pl_100 // a comment
    , input   logic                          aresetn // another comment

    , output a
    , output b
    );
endmodule

Actual output

Already formatted, no change.

OR

Re-formatted text does not match formatted text; formatting failed to converge!  Please file a bug.

Expected output Verible should obviously do some cleanup for this, and when one of the changes listed below is performed, it produces this:

module my_module (
      input  logic clk_pl_100  // a comment
    , input  logic aresetn     // another comment
    , output       a
    , output       b
);
endmodule

Verible fails to format the input file atop this report, unless any of the following changes is made to the source code:

1. I remove an underscore from clk_pl_100
2. I remove the blank line in the input list
3. I remove the inline comment // another comment

It's very unusual -- something is clearly tripping up verible in this simplified example.